About a dozen years ago, the world of test had reached an economic impasse: most digital designs had become sufficiently complex that standard scan testing techniques were no longer cost-effective.

PARIS – Silicon Image Inc. announced it has licensed Synopsys' DFTMAX compression, an integral part of the Galaxy Implementation Platform, to reduce manufacturing test cost and time. Silicon Image ...

As IC design sizes continue to double every 18 to 24 months, those charged with testing the finished product are challenged on multiple fronts. Test-data volume and testing time are expanding, while ...

Test compression sounds like magic. Read on to learn how this trick is done. Large, complex ICs are viable because their design meets test as well as functional requirements. Design for test (DFT) was ...

The trend in semiconductors leads to more IC test data volume, longer test times, and higher test costs. Embedded deterministic test (EDT) has continued to deliver more compression, which has been ...

During the late 1960s and most of the 1970s, the composites industry was absorbing the impact of what was then the recent introduction of carbon fiber. The resulting composites exhibited both high ...