Electronic Design

SystemC Advances Set the Stage For New SoC Design Flow Strategy

A new specification for Open Core Protocol (OCP) users will present a seamless flow for complex system-on-a-chip (SoC) designs. Publication of the spec comes via the OCP International Partnership (OCP ...
uni

SystemC to Timed Automata Transformation Engine (STATE)

STATE takes a SystemC design as input and transforms it into a corresponding UPPAAL timed automata model. The transformation is based on a formal semantics defined for SystemC in ...
Design-Reuse

Synopsys and OCP-IP Members Jointly Develop SystemC Modeling Methodology for OCP-Based SoC Design

MOUNTAIN VIEW, Calif. and PORTLAND, Oregon -- October 15, 2002 -- Synopsys, Inc. (Nasdaq: SNPS), the technology leader in complex integrated circuit (IC) design, and Open Core Protocol International ...
Design-Reuse

Accelerating High-Level SysML and SystemC SoC Designs

SysML, the dedicated system level UML-based notation proposed by the OMG, is gaining a lot of momentum as a system level design standard. Design productivity is one of the main challenges facing the ...
Electronic Design

Implement Abstraction By Encapsulation In SystemC

High-level design (HLD) represents a hardware design at a more abstract level than register transfer level (RTL). A high-level synthesis (HLS) tool then can be used to produce the RTL necessary to ...
EDN

CoWare releases SystemC modeling library source code

SAN FRANCISCO — CoWare Inc. has released SystemC modeling library (SCML) source code and reuse methodology guidelines, a kit that openly extends SCML's standards-based approach to all IEEE 1666 ...