The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS contains an AMBA AXI, AHB, or APB Bus Interface .

Oct 7th, 2013 -- The DSPI_FIFO is a fully configurable SPI master/slave device, which allows to configure polarity and phase of a serial clock signal SCK. DCD’s core enables microcontroller to ...

Bytom -- January 3rd, 2013 -- Serial Peripheral Interface – Master/Slave with not only single and dual but most of all quad SPI Bus support, is the newest IP Core introduced by Digital Core Design.

This application note presents the process of implementing SPI Master and Slave functionality using the Z8 Encore! series of microcontrollers. The document provides the software implementation that ...

This application note demonstrates a method of implementing the Serial Peripheral Interface (SPI) Master and Slave functionality on Z8 Encore! microcontrollers. The software implementation controls ...