Duke engineers show how a common device architecture used to test 2D transistors overstates their performance prospects in real-world devices.

A technical paper titled “Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors” was published by researchers at Korea University.

Lab architecture used to test 2D semiconductors artificially boosts performance metrics, making it harder to assess whether these materials can truly replace silicon.

The previous article examined the concept of logic gates. They can be made from discrete and active electronic components, although today logic gates are available within integrated circuits. In this ...