What Are Lock-Up Agreements? Key Insights and Examples

Explore what a lock-up agreement is, how it prevents insiders from selling shares post-IPO, and its impact on market dynamics ...
Semiconductor Engineering

Now You Can Automate Latch-Up Verification For 2.5/3D Technologies

Latch-up is modeled as a short circuit (low-impedance path) that can occur in an integrated circuit (IC). It may lead to destruction due to over-current resulting from interactions between parasitic ...
Semiconductor Engineering

Earlier Is Better In Latch-Up Detection

Physical verification is an essential step in integrated circuit (IC) design verification. Foundries provide design rule manuals that specify the precise physical requirements needed to ensure the ...
TechCrunch

Latch tools up with second smart access product for offices, apartment blocks

New York-based smart lock maker Latch, which targets the enterprise market, selling its locks plus a subscription digital entry management service to building owners wanting to offer value-add ...
EDN

Susceptibility of an Application to ESD-Induced Latch-up

All semiconductor devices are sensitive to electrostatic discharge (ESD) damage to varying degrees. This is true whether they are soldered to a PC board in an application, or whether they are ...
EDN

Dual JFETs prevent amplifier latch-up

Santa Clara, Calif. – Dual junction field-effect transistors (JFETs) from Siliconix Inc. are said to eliminate latch-up problems in amplifier designs. Latch-up occurs when several JFETs on the same ...