The size of designs continues to grow and IC manufacturers are pushing for higher test quality, especially in mission-critical applications such as transportation and medicine. More advanced nodes ...

The trend in semiconductors leads to more IC test data volume, longer test times, and higher test costs. Embedded deterministic test (EDT) has continued to deliver more compression, which has been ...

President, Wyoming Test Fixtures Inc. When used for material comparisons, notched testing is typically performed using a quasi-isotropic composite laminate, consisting of equal numbers of 0°, 45°, ...

Scan technology is essential for testing the digital content of large-volume devices. By using scan, you can make the device itself responsible for some of the “test” chores, and you can shorten the ...

Test compression sounds like magic. Read on to learn how this trick is done. Large, complex ICs are viable because their design meets test as well as functional requirements. Design for test (DFT) was ...

Last month we acquainted you with a few unique procedures for using conventional tune-up devices—such as a vacuum gauge, timing light and electrical analyzer—for evaluating the efficiency and ...

IC designers now have a powerful weapon in the struggle against rising test costs: commercially available EDA solutions that provide fast and effective means to implement scan compression on-chip. By ...